Basic SPICE Simulation
INTRO
Why simulate a circuit? Two compelling reasons can drive us.
- to better understand how the circuit works.
- to verfiy the circuit functions as specified.
The good news is that SPICE simulators are not only powerful, but available in many free versions. We'll use both LTSPICE (a schematic file) and PSPICE (a netlist file).
See an Advanced SPICE circuit in Part 2.
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UNDERSTAND YOUR CIRCUIT
Simulation is learning power tool to help build your intuitive understanding of a circuit. Play in this learning lab often!
- Change any component by say 2x or 1/2x.
- Ask yourself - how will it effect the output?
- Run the simulation and see what happens.
- Did the result confirm your understanding or develop new intuition based on this experience?
VERIFY YOUR SPEC
Design Verification (DV) can be a daunting, often confusing undertaking. But a straightforward approach can clear a successful path.
- Specifications - what part of the Requirements or Circuit Design are we trying to verify?
- Set Input and Conditions - how will we apply an input stimulus and set the conditions?
- Select Output and Measurement - where is the output, what do we measure and how can we calculate the expected values?
- Run SPICE - how will we run a simulation?
- Measure and Check - how do we check if our measured value will meet spec?
WHICH SPECS?
Select from Requirements or Design docs. You typically start with basic functions, then verifying more complex ones.
Source Link Requirements Specification Go there Circuit Design Go there
ERROR LIMITS
How do you decide what value passes a test? For a general functional test, I typical set the error limits as follows.
- 2% for Voltage tests.
- 5% for Frequency tests.
How to calculate the error limits? For a limit of X%, you set
- Lo Limit = Expected_Value * (1 - X/100)
- Hi Limit = Expected_Value * (1 + X/100)
SPICE CIRCUIT
LTSPICE Schematic: DVM1_basic1.asc
PSPICE Netlist: DVM1_basic1_netlist.cir
Right Click on filename, select "Save link as...",
HANDS-ON SIMULATION
RUN several simulation tests below - does the circuit meet spec?
- Download the SPICE file *.asc or *.cir.
- Right-click on filename, select "OPEN with", then select LTSPICE or PSPICE.
- Modify components and commands.
- Hit RUN and add traces to measure.
- Read and record the value. Does it fall within the Hi/Lo Limits?
INPUT VOLTAGE DIVIDER
Does the input divider accomplish it's purpose of either 1) directly passing, or 2) scaling down an input signal?
SPECIFICATION: Input Divider, Gain (K=1), 4V Range.
SET INPUT AND CONDITIONS
- Input: Vin = 4V step input,
- 4V Gain: K = 1.0 V/V
- 4V Select: Rsw1 = 1, Rsw2 = 1e12
SELECT OUTPUT AND MEASUREMENT
- Output: vadc
- Measure: read vadc at final time
- Expected Value: vadc = Vin*K = 4V.
RUN SPICE
- Vin step input: PWL(0s 0V 1us 4V)
- Time Analysis: .tran 0s 0.4s
MEASURE AND CHECK
- Error Limit: +/-2%
- Limits Lo, Hi: 3.98V, 4.02V
- Measured Value: ??? ⇒ PASS / FAIL?
SPECIFICATION: Input Divider, Gain (K=0.2), 20V Range.
SET INPUT AND CONDITIONS
- Input: Vin = 20V step input,
- 20V Gain: K = 1/5 = 0.2 V/V
- 20V Select: Rsw1 = 1e12, Rsw2 = 1
SELECT OUTPUT AND MEASUREMENT
- Output: vadc
- Measure: read vadc at final time
- Expected Value: vadc = Vin*K = 4V.
RUN SPICE
- Vin step input: PWL(0s 0V 1us 20V)
- Time Analysis: .tran 0s 0.4s
MEASURE AND CHECK
- Error Limit: +/-2%
- Limits Lo, Hi: 3.98V, 4.02V
- Measured Value: ??? ⇒ PASS / FAIL?
LOW-PASS FILTER
How can we run both a Time Analysis (TRAN) and Frequency (AC) Analysis to verify the functionality of the Low-Pass Filter?
SPECIFICATION: Low-Pass Filter, Risetime (tr63=0.03).
INPUTS AND CONDITIONS
- Input: Vin = 1V step input,
- 4V Gain: K = 1 V/V
- 4V Select: Rsw1 = 1, Rsw2 = 1e12
OUTPUTS AND MEASUREMENTS
- Output: vadc
- Measure: read time where vadc crosses 0.637V
- Expected Value: tr63 = 0.030s.
SPICE SIMULATION
- Vin step input: PWL(0s 0V 1us 1V)
- Time Analysis: .tran 0s 0.4s
RESULTS AND P/F
- Error Limit: +/-5%
- Limits Lo, Hi: 0.0285s, 0.0315s
- Measured Value: ??? ⇒ PASS / FAIL?
SPECIFICATION: Low-Pass Filter, Bandwidth -3dB (fc=5.3Hz).
INPUTS AND CONDITIONS
- Input: Vin = 1VAC
- 4V Gain: K = 1.0 V/V
- 4V Select: Rsw1 = 1, Rsw2 = 1e12
OUTPUTS AND MEASUREMENTS
- Output: vadc
- Measure: read the frequency where vadc reduces by 0.707 or -3dB.
- Expected Values: fc = 5.3 Hz; vadc = Vin*K*0.707 = 0.707VAC (-3dB)
SPICE SIMULATION
- Vin: 1VAC
- Freq Analysis: .AC dec 100 1Hz 100kHz
RESULTS AND P/F
- Error Limit: +/-0.5dB
- Limits Lo, Hi: -20dB, -22dB Vpeak
- Measured Value: ??? ⇒ PASS / FAIL?
SPECIFICATION: Low-Pass Filter, Attenuation at 60Hz.
INPUTS AND CONDITIONS
- Input: Vin = 0.1VAC
- 4V Gain: K = 1.0 V/V
- 4V Select: Rsw1 = 1, Rsw2 = 1e12
- Filter BW: fc = 5.3 Hz
- Filter Atten: H = fc/fnoise = 5.3Hz/60Hz = 0.084
OUTPUTS AND MEASUREMENTS
- Output: vadc
- Measure: read AC magnitude of vadc at 60Hz
- Expected Value: vadc = Vin*K*H = 0.084VAC (or -21.1dB)
SPICE SIMULATION
- Vin: 1VAC
- Freq Analysis: .AC dec 100 1Hz 100kHz
RESULTS AND P/F
- Error Limit: +/-0.5dB
- Limits Lo, Hi: -20dB, -22dB Vpeak
- Measured Value: ??? ⇒ PASS / FAIL?
HANDS-ON TEST TRACKER
Play in the Excel file - modify values, see what happens!
- Excel File: DVM1_Simulation_Test_Tracker.xlsx
- Right Click on the filename, select "Save link as...".
Test Result Checker
- Record several of your simulation results in the column labeled "Measured Value".
- The Excel formula automatically checks it against the Hi and Lo Limits.
- Initially all tests FAIL because no data is entered. How many can you get to PASS?
NEXT UP
Having verified our basic topology, let's dive a bit deeper into the circuit's operation with an Advanced SPICE simulation.
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