Output Voltage Limit

CIRCUIT

Schematic: Op_Amp_vlim.asc
Op Amp Symbol: Opamp_3.asy
Op Amp Shematic: Opamp_3.asc
Right Click on filename, select "Save link as...",

Back to Design Series

SPEC IT

Intro	The system provides you with +/12V power supply rails. That's good news because you need to deliver a +/-10V signal. However, your test shows the output slams into a limit less than 10V. How can you solve this issue?
Definition	Vlim - defines how close that the output voltage can swing to within the supply rails (Vcc or Vee). Vo_max+ = Vcc - Vlim Vo_max- = Vee + Vlim
Design Goal	Deliver a 10V signal into a 10k load
Design Spec	Vo ≥ 10.0V

DESIGN IT

• Circuit Design
  • Unity Gain: Kcl = 1V/V
  • R2=10k, R1=open
  • Vcc = 12V, Vee=-12V
• Op Model Param
  • Aol=1e6 fu=1e6 slew=5 vlim=2.5 ilim=0.04 ro=1
  • Output can swing within 2.5V of the rails.
• Circuit Test
  • Drive the input to just over 10V
     .step param Vstep list 1V 5V10.1V
      Repeats simulation for 3 levels of Vstep.
  • Expected vo ≥ 10V

TEST IT

• Run a Transient simulation. (.TRAN)
• Plot v(vs) and v(vo) and measure the output's highest voltage level.
• Did it meet spec?
  • If vo ≥ 10V, then PASS, else FAIL
•  DESIGN ISSUE: The output voltage fails to meet spec! 

SOLVE IT

• Incrementally decrease Vlim.
• Rerun the SPICE sim.
• What Vlim is needed to meet spec?

THEORY REFRESH

• The output voltage can swing only so close to the power supply rail VCC. Why?
  Let's take a look at a typical positive output structure..

• What components are between the output and VCC?
  • R5 - the resistor used to limit max output current.
  • Q7 - the output transistor that delivers positive output current.
• Vlim can be decribed by .
  • Vlim = (VCC - Vout) = Iout*R1 + VBE_Q7 + V_ISRC
• where
  • Iout*R5 - voltage across current limiting resistor
  • VBE_Q7 - base-emmiter voltage of Q7
  • V_ISRC - min voltage across current source (150uA)
• The specific Vlim for an op amp device will vary depending on its output structure and actual devices.
  A similar behavior holds true for the output swing toward the negative rail VEE.

• What happened to our original design?
  • Vlim = 2.5V
  • The expected max output would be
      Vo_max = VCC - Vlim = 12V - 2.5V = 9.5V

• Let's solve it
  • What Vlim is required for Vo_max = 10.0V?
  • Solve Vo_max = VCC - Vlim  for Vlim
  • Then calculate Vlim = VCC - Vo_max
• Retest the circuit with the new Vlim. Did your circuit meet spec?

 Select an op amp that meets or exceeds your required Vlim.

Back to Design Series...