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# SPICE Model: Opamp_4

## SCHEMATIC

• Behaviors Modelled
• opamp_1
• Gain
• Bandwidth
• Input / Output Resistance
• opamp_2
• opamp_3
• add  Voltage / Current Limits, Floating Vref
• opamp_4
• add  2nd and 3rd Higher Poles
• Design Guide
• After verifying a circuit topology, set voltage and current limits to those expected in op amps available in your company stock.

## INPUT PARAMETERS

• Aol - Open-Loop DC Gain
• fu - Unity-Gain Frequency.
•  Also called Gain-Bandwidth-Product (GBP) in most op amps.
• Slew - Maximum rate of voltage change dV/dt achievable by the device.
• Ro - Output Resistance.
• vlim - The maximim voltage the output can swing to within the supply rails.
• ilim - The maximum output current possible into a short circuit.
• fp23 - 2nd and 3rd higher poles, both defined at same frequency for convenience.

## HOW IT WORKS

• DC Gain provided by current source B_G1 (gain of gm) and R1
• v(out) = i(B_G1)*R1 = (v(+) - v(-))*gm*R1
• Aol = gm*R1
• Slew Rate defined by max B_G1 max current flowing into C1.
• B_G1 current is bounded using LIMIT function defined by I1max
• I = limit( {gm}*(v(+) - v(-)), +I1max, -I1max )
• Slew Rate = dV/dt = I1max / C1
• 1st Pole formed by R1, C1
• fp1 = 1/(2*pi*R1*C1)
• Unity-Gain Frequency defined by DC Gain and 1st pole
• fu = Aol*fp1
• The Max Voltage output is limited by DVLIM_P / VLP and DVLIM_N / VL_N.
• Max Pos output: vg1 ≈ vcc - VL_P
• Max Neg output: vg1 ≈ vee - VL_N.
• The Max Current output is limited by diodes VILIM_P and VILIM_N
• .model DILIM D( Ron=0.1 Vfwd=0V Ilimit={Ilim} )
• The internal nodes ride on a voltage vmid set midway between the supply rails by RM!, RM2 and EMID.

• The 2nd and 3rd poles are set by RLP1, CLP1 and RLP2, CLP2.
• Both poles set at same frequency: fp23 = 1/(2*pi*RLP*CLP)
• Typically fp23 located at 2 to 5 times above fu.

## INTERNAL CALCULATIONS

• .param I1max = 0.001   (choose G1's max current).
• .param C = I1max / (slew * 1e6)
• .param fp = fu/Aol
• .param C = 1/(2*pi*fp*R)
• .param gm = Aol/R
• .param vlim_p = vlim + I1max*Ron
• .param vlim_n = vlim + I1max*Ron
• .param CLP = 1/(2*pi*fp23*RLP)  (Choose RLP)

## TEST IT

• Run a .TRAN simulation of Test_Circuit_opamp_4.asc
• Circuit: R1=10k, R2=1e9 and Vstep=0.1V.
• With NO Higher Poles near fu.
• Op Amp params: fu=1e6 and fp23=100e6.
• Does vo show any overshoot? Should be none!
• With Higher Poles near fu.
• Op Amp params: fu=1e6 and fp23=2.5e6.
• Any overshoot? How much?