Input Bias Currents

CIRCUIT

Schematic: Op_Amp_ibias.asc
Op Amp Symbol: Opamp_2.asy
Op Amp Shematic: Opamp_2.asc
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SPEC IT

Intro	All op amps have a small DC current flowing in or out of its input ternimals. What causes these currents? Depends on the input device type:   • BJT - the base current needed to bias the transistor.    • MOSFET - the leakage current of the input ESD protection diodes. .
Definition	input bias currents - the current flowing into pos input (Ibp) and neg input (Ibn).
Design Goal	Amplifier Offset Error < 5mV due to Ibn and Ibp
Design Spec	Vo < 5mV due to input bias currents with Vs = 0V and voff = 0V

DESIGN IT

• Circuit Design
  •  Kcl = (R2+R1)/R1 = 2V/V
  • Choose: R1=100k
  • Calc: R2=100k
• Op Model Param
  • Aol=100000 fu=10e6 Ro=1
  • Ibp = Ibn = 0.1nA modeled as two current sources outside the op amp.
    Why? External bias currents help us visualize and analyze how it effects the circuit.
• Circuit Test
  • Input:  no input source (0V)
  • Output:  Vo = 0V with no errors
  • Expected Error Vo < 5mV

TEST IT

• Run a Transient simulation. (.TRAN)
• Plot the output error v(vo)
• Did it meet spec?
  • If vo <= 5mV, then PASS, else FAIL
•  DESIGN ISSUE: The output offset fails to meet spec! 

SOLVE IT

• Incrementally decrease R1 and R2, while keeping the same R2/R1 ratio..
• Rerun the SPICE simulation.
• What are the values of R1, R2 to acheive Vo < 5mV?

THEORY REFRESH

• How much output error is caused by Ibp and Ibn?
• Ibp flows into Rs creating a voltage, which is amplified by the non-inverting gain.

• Ibn flows into R2 only with the op amp acting like a transimpedance amplifier.
  Note the polarity!

• What happened to our original design?
  • vo = ibp * Rs * (R1+R1)/R1
        = 0.1nA*1k*(100k+100k)/100k = 0.2mV
  • vo = - ibn * R2
        = - 0.1nA*100k = -10mV
  • Aha! R2 is the major culprit!

• Let's solve it
  • What R2 is required for a Vo < 5mV?
  • Solve Vo = Ibn*R2 for R2.
  • Then calculate your R2 maximum.
• Retest the circuit with the new voff. Did your circuit meet spec?
  
  
• BONUS Challenge!
  • What if we needed the 100k values for a low-power design?
  • Could we choose Rs so that the effects of Ibp and Ibn cancel?
  • Remember that Ibn and Ibp create errors of opposite polarity!
• Let's go for it - set the errors of the bias currents equal to one another. Then solve the equation for the magic value of Rs.

• Let's try it out. Set R1=R2=100k and Rs = 100k||100k = 50k.
• Rerun the simulation. Did the output vo slip under the 5mV design specification?

 

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