Error Budget Analysis

Part 1 - Offset Errors

INTRO

You've designed the circuit and chosen components. But before you start to build anything, a critical question arises: 

  Can you verify that the circuit will meet its accuracy spec?

An Error Budget Analysis (EBA) is one of the coolest and most challenging analysis you'll perform. Also called a Tolerancw Stackup Analysis, the method evaluates how each Error Source impacts the circuit's Offset or Gain Errors.

Lastly the errors are summed and checked if they fly under the allowed Error Budget (Requiements). If YES, then high fives! if NO, then it's time to investigate higher precision-grade components or a better suited circuit topology.

In Part 1 you'll learn to analyze the Offset Errors; Part 2 the Gain Errors.

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OFFSET AND GAIN ERRORS

• Ideal Amplifier with Gain K
  • Vo = Vin*K
• Actual Amplifier with errors
  •  Vo = Vin* (K+∆K) + ∆Voffset
•  ∆K  - Gain Error
  • change in Gain from ideal (K).
  • also called Slope, Span error
•  ∆Voffset  - Offset Error
  • change in offset from ideal (0V)
  • also called Intercept, Zero Error
• Combined Offset and Gain Errors
  • Error = ±∆Voffset  + ( ±∆K x Reading )

 

MAX BUDGET

• Max allowable error comes from our requirements.
  • 4V:    ∆Voffset = 15mV,   ∆K = 1.5% of Reading
  • 20V:  ∆Voffset = 75mV,   ∆K = 1.5% of Reading

 

CIRCUIT WITH ERRORS

Here's an overview of the instrument's Offset and Gain errors. Note! We need to find the errors for both the 4V and 20V Ranges.

ATTENUATOR SIGNAL GAINS

• 4V: SW1 On, SW2 Off
    Kdiv = 1.0
• 20V: SW1 Off, SW2 On
    Kdiv = R2/(R1+R2)
           =200k/(800k+200k)
           = 0.2

ERROR SOURCES

Offset Errors	Value
ADC Offset (Zero) Error	2 LSBs
ADC Resolution (Quantization) Error	1/2 LSBs
SW1 Off-State Leakage Current	1nA
SW2 Off-State Leakage Current	1nA

Gain Errors	Value
R1 Tolerance	1%
R2 Tolerance	1%
ADC Gain (Span) Error	2 LSBs
Voltage Reference Error	50mV

 

ADC OFFSET ERROR

We'll walk through the method with this relatively straightforward error.

• Identify Error Source
  • Voff = 2 LSBs
    (need to convert to V)
  • Voff = 2 LSBs / 2^N x Vrefin
            = 2 / 1024 x 5V
            = 9.8mV
• Choose Analysis Node - a convenient location to
  calculate the error's impact on the circuit.
  • vadc1
• Calculate Sensitivty - how does error impact Analysis Node?
  • S = vadc1 / voff = 1
    (see Sensitivty Calc below)
• Calculate Error
  • ∆Voffset = voff x S
               = 9.8mV x 1
               = 9.8mV
• Calc Gain from Input Vin to Analysis Node
  • Ka_4V = vadc1 / vin = Kdiv_4V = 1.0
  • Ka_20V = vadc1 / vin = Kdiv_20V = 0.2
• Calc Error Referred to Input (RTI)
  • 4V: ∆Voffset_RTI = ∆Voffset / Ka_4V
                             = 9.8mV / 1.0
                             = 9.8mV
  • 20V: ∆Voffset_RTI = ∆Voffset / Ka_20V
                             = 9.8mV / 0.2
                             = 49mV

Notice how a 9.8mV ADC error produces a 49mV equivalent error at the input on the 20V Range.

  

ADC RESOLUTION ERROR

The finite resolution of the ADC causes a conversion error of 1/2 LSB. (Also called Quantization Error.)

• Identify Error Source
  •  Vres = 1/2 LSB
    (need to convert to V)
  • Vres = 0.5 LSB / 2^N x Vrefin
            = 0.5 / 1024 x 5V
            = 2.4mV
• Choose Analysis Node - a convenient location to
  calculate the error's impact on the circuit.
  • vadc1
• Calculate Sensitivty - how does error impact Analysis Node?
  • S = vadc1 / vres = 1
    (see Sensitivty Calc below)
• Calculate Error
  • ∆Voffset = vres x S
               = 2.4mV x 1
               = 2.4mV
• Calc Gain from Input Vin to Analysis Node
  • Ka_4V = vadc1 / vin = Kdiv_4V = 1.0
  • Ka_20V = vadc1 / vin = Kdiv_20V = 0.2
• Calc Error Referred to Input (RTI)
  • 4V: ∆Voffset_RTI = ∆Voffset / Ka_4V
                             = 2.4mV / 1.0
                             = 2.4mV
  • 20V: ∆Voffset_RTI = ∆Voffset / Ka_20V
                             = 2.4mV / 0.2
                             = 12mV

Similarly, notice how a 2.4mV ADC resolution error produces a 12mV equivalent error at the input on the 20V Range.

  

SW1 OFF-STATE CURRENT

Although currents are typically relatively small, they can cause significant voltages flowing into relatively large resistors.

• Identify Error Source
  •  Ioff = 1nA
• Choose Analysis Node - a convenient location to
  calculate the error's impact on the circuit.
  • v1
• Calculate Sensitivity - how does error impact Analysis Node?
  • 4V:    S = v1 / ioff = 0
  • 20V:  S = v1 / Ioff = 200k || 800k = 160k
    (see Sensitivty Calcs below)
• Calculate Error
  • 20V: ∆Voffset = Ioff x S = 0
  • 4V:  ∆Voffset = Ioff x S
                      = 1nA x 160k
                      = 0.2mV
• Calc Gain from Input Vin to Analysis Node
  • Ka_4V = v1 / vin = Kdiv_4V = 1.0
  • Ka_20V = v1 / vin = Kdiv_20V = 0.2
• Calc Error Referred to Input (RTI)
  • 4V: ∆Voffset_RTI = ∆Voffset / Ka_4V
                             = 0mV / 1.0
                             = 0mV
  • 20V: ∆Voffset_RTI = ∆Voffset / Ka_20V
                             = 0.16mV / 0.2
                             = 0.8mV

NOTE! Although Error is relatively insignficant, we still need to verify and document.

 

SW2 OFF-STATE CURRENT

Although currents are typically relatively small, they can cause significant voltages flowing into relatively large resistors.

• Identify Error Source
  •  Ioff = 1nA
• Choose Analysis Node - a convenient location to
  calculate the error's impact on the circuit.
  • v1
• Calculate Sensitivty - how does error impact Analysis Node?
  • 4V: S = v1 / Ioff = 0
  • 20V: S = v1 / Ioff = 0
    (see Sensitivty Calc below)
• Calculate Error
  • 4V:  ∆Voffset = Ioff x S = 0V
  • 20V:  ∆Voffset = Ioff x S = 0V
• Looks like were done here with 0V errors, RTI errors are also 0V.

NOTE! Although Error is zero, still need to verify and document.

 

 

OFFSET SENSITIVITY CALCS

Here's where we do the often interesting and sometimes challenging work of finding the Sensitivity.

ADC VOFF, VRES

Find Sensitivity

• Analysis Node: vadc1
• if Vin=0, then voff (or vres) appears directly at vadc1. Therefore, there's a unity gain from the error to vadc1.
• S  = vadc1 / voff = 1
• S  = vadc1 / vres = 1

 

SW1 IOFF

Find Sensitivity

• Analysis Node: v1
• 4V Range: SW1 On, SW2 Off
  • No ioff when switch is On
  • S = v1 / ioff = 0
• 20V Range: SW1 Off, SW2 On
  • To simplify analysis, assume input source resistance Rs and SW2 are essentially short circuits (Rs=0, Ron=0) compared to R1=800k and R2=200k. The circuit nicely reduces to
    .
  • therefore S  = v1 / ioff = R1 || R2

 

SW2 IOFF

Find Sensitivity

• Analysis Node: v1
• 4V Range: SW1 On, SW2 Off
  • To simplify analysis, assume input source resistance Rs and SW1 are essentially short circuits (Rs=0, Ron=0) compared to R1=800k and R2=200k. The circuit nicely reduces to
    .
  • Check out how v1 is essentially shorted to GND.
  • therefore S  = v1 / ioff = 0
• 20V Range: SW1 Off, SW2 On
  • No ioff when SW2 is On
  • S = v1 / ioff = 0

 
 

TOTAL OFFSET ERRORS

Worst Case Analysis estimates the total error under the most unfavoable conditions: all errors at their maximum limit AND in the same polaritiy.

• WCA = | ∆Voffset1 | + | ∆Voffset2 | + ...
        = |ADC_voff_RTI| + |ADC_vres_RTI| + |SW1_ioff_RTI| + |SW2_ioff_RTI|
• 4V:  WCA = |9.8mV | +  | 2.4mV | +  | 0V | + | 0V |
                = 12.2mV
• 20V:  WCA = | 49mV | +  | 12mV | +  | 0.8mV |  +  | 0V |
                  =  61.8mV

Does the Total Error fly under the Error Budget (Requirements)?

• 4V:  WCA = 12.2mV < 15mV?
     Yes - PASS! 
• 20V: WCA = 61.8mV < 75mV?
     Yes - PASS! 

Congratulations if you've traveled this far - you deserve a coffee, tea or treat! We've navigated a number of key concepts together that can help build your EE power toolkit.

 

HANDS-ON

Play in the Excel file - modify values, see what happens!

• Excel File:  DVM1_-_EBA_Offset_Gain_Errors1.xlsx
• Right Click on the filename, select "Save link as...".

Input Range

• Suppose you needed to meet a total offset spec of 10mV on the 4V range? What ADC offset error (now voff = 2 LSBs) would be required to meet the new spec?

 

NEXT UP

With the Offset Errors now summed up, time to see how the Gain Errors stack up.

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