SMU - Force Voltage

How It Works

 

 
Download SPICE Netlist or LTSPICE Schematic
Right Click on filename, select "Save link as..."

Let's create a Source Measure Unit (SMU) in Force Voltage mode using basic system blocks. Why? Learning these simple blocks helps you develop basic understanding and intuition. Later you can build more complex SMUs on this foundational understanding. With a hands-on SPICE model, you can source voltage and measure current (FVMI) to verify a resistance spec.

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FORCE VOLTAGE

This mode Forces a Voltage across the Device-Under-Test (DUT) and Measures the Current. Why is this useful?

Consider an Audio Amp's specification of Input Resistance: Rin = 20k ± 10% at 10V. Notice how the spec calls out a condition, in this case 10V. So the SMU's test mission is to

1. Force the Condition (FV = 10V)
2. Measure the Parameter (MI = Io)
3. Calc Rin = FV/MI and Check if passes within Limits (20k ± 10%)
    

BASIC BLOCKS

 

How can you implement the Force Voltage mode? SMUs typically implement the classic voltage feedback loop.

• Set Point FV - where do you want Vo to go?
• Feedback MV - where is Vo now?
• Error - what's the difference between set FV and feedback MV,
• Controller - given the error = FV - MV, how do we adjust Vctl to get there?
• Amplifier - provides drive (voltage / current) to the Device Under Test (DUT).
• Measure Current - senses output current through Rs (MI).
• Measure Voltage - senses output voltage (MV).

 

INTEGRAL CONTROL

The Controller is implemented with an integrator - a simple, yet powerful function. What's its role? The Integrator keeps a continuous running total of the error over time. Note, in the integration equation below, the ∫ represents the letter S for a Summation.

To see how it works intuitively, let's choose set = 5V.

• Initially with Vo = 0V, a portion of the error = set - feedback = 5V - 0V = 5V gets summed over time (integrated) so that Vctl begins to rise quickly.
• As Vo gets close to target, say Vo = 4.5V, a smaller error = 5V - 4.5V = 0.5V gets summed and Vctl rises more slowly.
• Finally, with Vo = 5V, a zero error = 5V - 5V = 0V gets summed and Vctl HOLDS STEADY - goal reached!

You can choose Kint (the portion of error to be summed) to control the speed of the control loop.
 

SPICE CIRCUIT - HOW IT WORKS

• V_SET creates a voltage for the FV set level
  • PWL( 0us 0  1us {set} ) defines the time / voltage pairs of a step input.
• Most of the system blocks are modelled with a basic voltage in/out device.
  • E_ERR - Error Amplifier (K = 1)
  • E_AMP - Output Amplifier (K = 1)
  • E_MI - Measure Current (K = 1/Rs)
      1/Rs converts voltage across Rs back into current level.
• E_MV - Measure Voltage (K = 1)
• The integrator is modelled by G_INT (converts error voltage into a current) and Cint (integrates current).
  • Kint scales how much of error gets integrated
  • useful for speed (bandwidth) control
• Select Force Mode (connect either MV or MI as feedback).
  • For Force Voltage: set netname at E_ERR (-) input to MV.
  • For Force Current: set netname at E_ERR (-) input to MI.
• .TRAN 20us requests a Transient (time) simluation for 0 to 20us.
  

 

SIMULATION

Let's take this SMU out for a test drive. Just two actions are needed:

1. Set the netname on the feedback net (E_ERR, neg input) to MV.
    
2. Enable the parameters for FV:
      .param set=10.0 Rs=100 Rdut=20k Kint=100
   Comment out the FI params:
     *.param set=0.001 Rs=100 Rdut=10 Kint=10000

 CIRCUIT INSIGHT   Run a TRAN simulation of SMU-FVFI-basic-0.cir (or *.asc). Add traces v(set) and v(mv). Does MV rise to the set point of 10V? Add v(error) and observe - does v(error) get smaller as v(mv) approaches v(set).

 RESISTANCE MEASURE   Let's perform a resistance test. First, measure the DUT current by opening another plot window and adding trace v(mi). Finally, to calculate resistance, add another plot window and trace v(mv)/v(mi). Does your test verify Rdut = 20k?

 SPEED CONTROL   Now try your hand at speed control! Adjust Kint up or down by 2x and rerun the simulation. Does v(mv) rise faster or slower?

SPICE NETLIST

Download SPICE Netlist or LTSPICE Schematic
Right Click on filename, select "Save link as..."

* SMU-FVFI-basic-1.asc
*
* Set Params
* FV
.param set=10.0 Rs=100 Rdut=20k Kint=100
* FI
*.param set=0.001 Rs=100 Rdut=50 Kint=20000
*
* Set Point
VSET  set  0  PWL(0us 0 1us {set})
*
* Error
* FV Mode: set E_ERR (-) input to MV
* FI Mode: set E_ERR (-) input to MI
E_ERR error 0  set MV  1.0
*
* Controller (Integrator)
G_INT  0 Vctl  error 0  {Kint}
Cint  Vctl  0  1
Rint  Vctl  0  1e6
*
* Output Amp
E_AMP  Va 0  Vctl 0  1.0
*
* Current Sense
Rs  Va  Vo  {Rs}
*
* Device Under Test
Rdut  Vo  0  {Rdut}
*
* Measure Current
E_MI  MI 0  Va Vo  {1/Rs}
*
* Measure Voltage
E_MV  MV 0  Vo 0  1.0
*
* SIMULATION
.tran 100ms
.probe
.end

 

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